1. Field of the Invention
The invention relates to a liquid crystal display device, and more particularly, to an array substrate having a color filter on a thin film transistor structure that is suitable for a wide scope of applications, particularly for increasing the aperture ratio and simplifying the fabrication process.
2. Discussion of the Related Art
In general, flat panel display devices have been used for portable display devices because they are thin, light weight, and have low power consumption. Among the various types of flat panel display devices, liquid crystal display (LCD) devices find wide use for laptop computers and desktop computer monitors because of their superior resolution, color image display, and display quality.
Optical anisotropy and the polarization characteristics of liquid crystal molecules are utilized to generate desirable images. Liquid crystal molecules have specific alignment directions that result from their own anisotropic characteristics. The specific alignment directions can be modified by electric fields that are applied to the liquid crystal molecules. In other words, the electric fields applied upon the liquid crystal molecules can change the alignment of the liquid crystal molecules in accordance with their dielectric anisotropy. Due to the liquid crystal's optical anisotropy, the incident light refracts according to the alignment of the liquid crystal molecules.
Specifically, LCD devices include upper and lower substrates having electrodes that are spaced apart and face into each other, and a liquid crystal material is interposed therebetween. Accordingly, when a voltage is applied to the liquid crystal material through the electrodes of each substrate, the alignment direction of the liquid crystal molecules changes in accordance with the applied voltage, thereby displaying images. By controlling the applied voltage, the LCD device provides various light transmittances to display image data.
Liquid crystal display (LCD) devices find wide applications in office automation (OA) and video equipment due to their characteristics such as lightweight, slim design, and low power consumption. Among different types of LCD devices, active matrix LCDs (AM-LCDs) (AM-LCDs) having thin film transistors and pixel electrodes arranged in a matrix form provide high resolution and superiority in displaying moving images. A typical LCD panel has an upper substrate, a lower substrate, and a liquid crystal layer interposed therebetween. The upper substrate (referred to as a color filter substrate) includes a common electrode and color filters. The lower substrate (referred to as an array substrate) includes thin film transistors (TFT's), such as switching elements, and pixel electrodes.
As previously described, an LCD device operates based on the principle that the alignment direction of liquid crystal molecules varies with applied electric fields between the common electrode and the pixel electrode. Accordingly, the liquid crystal molecules function as an optical modulation element having variable optical characteristics that depend upon the polarity and/or magnitude of the applied voltage.
FIG. 1 shows an expanded perspective view illustrating a related art active matrix liquid crystal display device. As shown in FIG. 1, the LCD device 11 includes an upper substrate 5 (referred to as a color filter substrate) and a lower substrate 22 (referred to as an array substrate) having a liquid crystal layer 14 interposed therebetween. On the upper substrate 5, a black matrix 6 and a color filter layer 8 form an array matrix including multiple red (R), green (G), and blue (B) color filters surrounded by the black matrix 6. Additionally, a common electrode 18 formed on the upper substrate 5 covers the color filter layer 8 and the black matrix 6.
On the lower substrate 22, multiple thin film transistors T form an array matrix corresponding to the color filter layer 8. Multiple gate lines 13 and data lines 15 perpendicularly cross one another such that each TFT T is located adjacent to each intersection of the gate lines 13 and the data lines 15. Furthermore, multiple pixel electrodes 17 are formed on a pixel region P defined by the gate lines 13 and the data lines 15 of the lower substrate 22. The pixel electrode 17 is a transparent conductive material having high light transmissivity, such as indium tin oxide (ITO) or indium zinc oxide (IZO).
FIG. 1 also shows a storage capacitor C disposed to correspond to each pixel P and connected in parallel to each pixel electrode 17. The storage capacitor C has a portion of the gate line 13 as a first capacitor electrode, a storage metal layer 30 as a second capacitor electrode, and an interposed insulator (shown as reference numeral 16 of FIG. 2). Since the storage metal layer 30 connects to the pixel electrode 17 through a contact hole, the storage capacitor C electrically contacts the pixel electrode 17.
In the related art LCD device shown in FIG. 1, a scanning signal is applied to the gate electrode of the thin film transistor T through the gate line 13, and a data signal is applied to the source electrode of the thin film transistor T through the data line 15. As a result, the liquid crystal molecules of the liquid crystal material layer 14 align and arrange by the operation of the thin film transistor T, and this operation controls the incident light passing through the liquid crystal layer 14 to display an image. Namely, the electric fields induced between the pixel and common electrodes 17 and 18 re-arrange the liquid crystal molecules of the liquid crystal material layer 14 so that the incident light can be converted into the desired images in accordance with the induced electric fields.
When fabricating the LCD device 11 of FIG. 1, the upper substrate 5 aligns with and attaches to the lower substrate 22. In this process, the upper substrate 5 may misalign with respect to the lower substrate 22, and light leakage may occur in the completed LCD device 11 due to a marginal error in attaching the upper and lower substrates 5 and 22.
FIG. 2 shows a schematic cross-sectional view taken along line II—II of FIG. 1, illustrating a pixel of the related art liquid crystal display device.
As shown in FIG. 2, the related art LCD device includes the upper substrate 5, the lower substrate 22, and the liquid crystal layer 14. The upper and lower substrates 5 and 22 are spaced apart from each other, and the liquid crystal layer 14 is interposed therebetween. The upper and lower substrates 5 and 22 are often referred to as a color filter substrate and an array substrate, respectively, because the color filter layer 8 forms upon the upper substrate and multiple array elements are formed on the lower substrate 22.
In FIG. 2, the thin film transistor T is formed on the front surface of the lower substrate 22. The thin film transistor T includes a gate electrode 32, an active layer 34, a source electrode 36, and a drain electrode 38. Between the gate electrode 32 and the active layer 34, a gate insulation layer 16 is interposed to protect the gate electrode 32 and the gate line 13. As shown in FIG. 1, the gate electrode 32 extends from the gate line 13 and the source electrode 36 extends from the data line 15. All of the gate, source, and drain electrodes 32, 36, and 38 are formed of a metallic material while the active layer 34 is formed of silicon. A passivation layer 40 protects the thin film transistor T. In the pixel region P, the transparent and conductive pixel electrode 17 is disposed on the passivation layer 40 and contacts the drain electrode 38 and the storage metal layer 30 through contact holes formed in the passivation layer 40.
Meanwhile, as mentioned above, the gate electrode 13 acts as a first electrode of the storage capacitor C, and the storage metal layer 30 acts as a second electrode of the storage capacitor C. The gate electrode 13 and the storage metal layer 30 thus constitute the storage capacitor C with the interposed gate insulation layer 16.
FIG. 2 also shows the upper substrate 5 being spaced apart from the lower substrate 22 over the thin film transistor T. On the rear surface of the upper substrate 5, a black matrix 6 is disposed in a position corresponding to the thin film transistor T, the gate line 13 and the data line 15. The black matrix 6 covers the entire surface of the upper substrate 5 and has openings corresponding to the pixel electrode 17 of the lower substrate 22, as shown in FIG. 1. The black matrix 6 prevents light leakage in the LCD panel except for the portion for the pixel electrode 17. The black matrix 6 protects the thin film transistor T from the light such that the black matrix 6 prevents generation of a photo-current in the thin film transistor T. The color filter layer 8 is formed on the rear surface of the upper substrate 5 to cover the black matrix 6. Each of the color filters 8 has one of the red 8a, green 8b, and blue 8b colors and corresponds to one pixel region P where the pixel electrode 17 is located. A transparent and conductive common electrode 18 is disposed on the color filter layer 8 over the upper substrate 5.
In the related art LCD panel discussed above, the pixel electrode 17 has a one-to-one correspondence with one of the color filters. Furthermore, in order to prevent cross-talk between the pixel electrode 17 and the gate and data lines 13 and 15, the pixel electrode 17 is spaced apart from the data line 15 by the distance A and from the gate line 13 by the distance B, as shown in FIG. 2. The open spaces A and B between the pixel electrode 17 and the data and gate line 15 and 13 cause a malfunction, such as light leakage, in the LCD device. Namely, the light leakage mainly occurs in the open spaces A and B so that the black matrix 6 formed on the upper substrate 5 should cover the open spaces A and B. However, when the upper substrate 5 is arranged with the lower substrate 22 or vice versa, a misalignment may occur between the upper substrate 5 and the lower substrate 22. The black matrix 6 is therefore extended to completely cover the open spaces A and B. That is, the black matrix 6 has been designed to provide an aligning margin to prevent light leakage. However, extending the black matrix reduces the aperture ratio of the liquid crystal panel by as much as the aligning margin of the black matrix 6. Moreover, if there are errors in the aligning margin of the black matrix 6, light leakage still occurs in the open spaces A and B, and deteriorates the image quality of an LCD device.
To overcome the above-mentioned problems, it is suggested that the black matrix and the color filter be formed over the array substrate where the thin film transistors are already formed. This structure is often referred to as a color filter on a thin film transistor (COT) structure.
FIG. 3 shows a partially enlarged plane view of an array substrate having a related art color filter on a thin film transistor (COT) structure.
As shown in FIG. 3, an array substrate includes multiple gate lines 52 disposed in a transverse direction and multiple data lines 66 disposed in a longitudinal direction. The multiple gate lines 52 and the multiple data lines 66 cross one another and define a pixel region P. A thin film transistor T is formed at each intersection of the gate line 52 and the data line 66. The thin film transistor T includes a gate electrode 54, an active layer 58, a source electrode 62, and a drain electrode 64. In the pixel regions P defined by the gate lines and data lines 52 and 66, multiple color filters 72a, 72b, and 72c are located therein. Additionally, a pixel electrode 80 corresponds to each pixel region P. The pixel electrode 80 is disposed on the color filter 72 and contacts the drain electrode 64. Namely, the color filter 72 has a location underneath the pixel electrode 80, and then the pixel electrode 80 electrically contacts the drain electrode 64 through a contact hole formed in the color filter 72.
Meanwhile, a storage capacitor Cst includes a portion of the gate line 52 and a storage metal layer 68. Thus, the portion of the gate line 52 acts as a first electrode of the storage capacitor Cst, and the storage metal layer 68 acts as a second electrode of the storage capacitor Cst. The pixel electrode 80 electrically contacts the storage metal layer 68, so that it electrically connects to the storage capacitor Cst in parallel.
The array substrate of FIG. 3 has a color filter on a thin film transistor (COT) structure. In such a COT structure, a black matrix 74 and the color filters 72 are formed on a substrate (reference number 50 of FIG. 4A). The black matrix 74 corresponds to the thin film transistors T and the gate lines 52 and the data lines 66, so that it prevents light leakage in the LCD device. An opaque organic material forms the black matrix 74, thereby blocking the light incident to the thin film transistors T. Also, it protects the thin film transistors T from the external impact.
Although FIG. 3 shows the black matrix 74 being disposed over the gate lines 52, the black matrix 74 over the gate lines 52 can be omitted when the color filters 72 neighboring up-and-down pixels have the same color.
FIGS. 4A to 4G show cross-sectional views taken along a line IV—IV of FIG. 3, illustrating the process steps of fabricating the related art array substrate having a color filter on a thin film transistor (COT) structure.
In FIG. 4A, a first metal layer, such as aluminum (Al), aluminum alloy, copper (Cu), tungsten (W), chromium (Cr) or molybdenum (Mo), is deposited on the surface of a substrate 50, and then patterned through a first mask process to form a gate line 52 and a gate electrode 54. Thereafter, a gate insulation layer 56 (a first insulating layer) is formed on the substrate 50 to cover the gate line 52 and the gate electrode 54. An inorganic material, such as silicon nitride (SiNx) or silicon oxide (SiO2), forms the gate insulation layer 56.
Next, FIG. 4B, shows an intrinsic amorphous silicon layer (a-Si:H) and then an n+-doped amorphous silicon layer (n+a-Si:H) that are sequentially deposited on the entire surface of the gate insulation layer 56, and then simultaneously patterned through the second mask process to form an active layer 58 and an ohmic contact layer 60. The active layer 58 is disposed over the gate electrode 54, and the ohmic contact layer 60 is then located on the active layer 58.
FIG. 4C shows that after forming the active layer 58 and the ohmic contact layer 60, a second metal layer is deposited over an entire of the substrate 50, and then patterned through the third mask process to form a source electrode 62, a drain electrode 64, a data line 66, and a storage metal layer 68. The source electrode 62 extends from the data line 66 and contacts one portion of the ohmic contact layer 60. The drain electrode 64 is spaced apart from the source electrode 62 and then contacts the other portion of the ohmic contact layer 60. The storage metal layer 68 overlaps a portion of the gate line 52. Thereafter, a portion of the ohmic contact layer 60 between the source and drain electrodes 62 and 64 is etched by using the source and drain electrodes 62 and 64 as masks, and a thin film transistor T and a storage capacitor Cst are complete. As described with reference to FIG. 3, the thin film transistor T includes the gate electrode 54, the active layer 58, the ohmic contact layer 60, the source electrode 62, and the drain electrode 64. Also, the storage capacitor Cst includes the gate line 52, the storage metal layer 68, and the interposed first insulator 56.
Thereafter, a second insulating layer 70 is deposited over the entire surface of the substrate 50 to cover the patterned second metal layer. The second insulating layer 70 may be formed of silicon nitride (SiNx) or silicon oxide (SiO2).
FIG. 4D shows a color resin being formed on the second insulating layer 70 and then developed to form color filters 72a, 72b and 72c having red (R), green (G), and blue (B) colors. The color filters 72a, 72b, and 72c for displaying the full spectrum of colors are formed in the pixel regions P. When developing the color resin, the same mask (the fourth mask) is used for each red (R), green (G) and blue (B) color filter.
FIG. 4E shows a photosensitive opaque organic layer being deposited over the color filter layer 72, and then patterned through a fifth mask process to form a black matrix 74 corresponding in position to the thin film transistor T. Although not shown exactly in FIG. 4E, the black matrix is formed to correspond to and overlap the data line 66.
Further, although shown in FIG. 3 but not in FIG. 4E, the black matrix 74 that may be disposed over the gate line 52 can be omitted when the color filters disposed in the up-and-down neighboring pixels have the same color continuously.
FIG. 4F shows a step of forming contact holes through the color filter layer 72 and second insulation layer 70. Portions of the color filter layer 72 and second insulation layer 70 are simultaneously etched out through a sixth mask process to expose the drain electrode 64 and the storage metal layer 68, respectively, thereby forming a drain contact hole 76 to the drain electrode 64 and a storage contact hole 78 to the storage metal layer 68.
FIG. 4G shows a step of forming a pixel electrode 80 on the color filter 72. A transparent conductive layer of indium tin oxide (ITO) or indium zinc oxide (IZO) is deposited over the entire of the substrate 50 to cover the color filters 72 and the black matrix 74. Thereafter, the first transparent conductive layer is patterned through a seventh mask process, thereby forming the pixel electrode 80 on the color filter 72 within the pixel region P. The pixel electrode 80 contacts both the drain electrode 64 and the storage metal layer 68, respectively, through the drain contact hole 76 and the storage contact hole 78.
However, the above-mentioned manufacturing process requires many more steps, for example, those needed for the seventh mask processes, due to the configuration of the thin film transistor and other elements. Therefore, the process time and the product cost increase, and the manufacturing yields decrease.